Design and Implementation of a Lightweight CNN-Based Face Recognition Attendance System on FPGA

Authors

  • Jing Wen Tan Faculty of Electrical and Electronic Engineering, Universiti Tun Hussein Onn Malaysia, Batu Pahat, Johor, Malaysia
  • Nabihah Binti Ahmad Faculty of Electrical and Electronic Engineering, Universiti Tun Hussein Onn Malaysia, Batu Pahat, Johor, Malaysia
  • Chessda Uttraphan Faculty of Electrical and Electronic Engineering, Universiti Tun Hussein Onn Malaysia, Batu Pahat, Johor, Malaysia
  • Suhaila Isaak Division of Electronic and Computer Engineering, Faculty of Electrical Engineering, Universiti Teknologi Malaysia, Johor Bahru, Johor, Malaysia

DOI:

https://doi.org/10.56532/mjsat.v6iS2.814

Keywords:

Face Recognition, Lightweight CNN, FPGA, Attendance System, Fixed-Point Quantization

Abstract

Low-cost Field-Programmable Gate Array (FPGA) implementation of convolutional neural network (CNN)-based face recognition remains challenging because of the limited computational resources and memory available on embedded hardware platforms. This study proposes a lightweight CNN-based face recognition attendance system implemented on a Cyclone IV EP4CE115 FPGA to achieve efficient real-time operation. The developed embedded platform combines live image acquisition using an OV7670 camera, fixed-point CNN inference, Video Graphics Array (VGA) visualization, and Universal Asynchronous Transmitter (UART)-based attendance logging within a single hardware system. The recognition model was trained using 590 facial images representing 42 identity classes, while data augmentation increased the number of training samples to 1,652. Software evaluation produced a validation accuracy of 94.32% and a testing accuracy of 98.88% before the trained network was converted into a fixed-point representation for hardware deployment using SystemVerilog. Register Transfer Level (RTL) verification demonstrated a classification accuracy of 97.62%, with prediction results remaining fully consistent with those generated by the Python fixed-point reference model. The implemented FPGA system operated at 1.86 frames per second with an estimated power consumption of 171.45 mW. The experimental results confirm that the proposed architecture provides a practical balance between recognition accuracy, hardware efficiency, and energy consumption, demonstrating the feasibility of deploying lightweight CNN-based attendance monitoring systems on resource-constrained FPGA devices.

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Design and Implementation of a Lightweight CNN-Based Face Recognition Attendance System on FPGA

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Published

2026-10-20

Issue

Section

Special Issue: Postgraduate Seminar in Electrical and Electronic Engineering 2026

How to Cite

[1]
“Design and Implementation of a Lightweight CNN-Based Face Recognition Attendance System on FPGA”, Malaysian J. Sci. Adv. Tech., vol. 6, no. S2, pp. 42–53, Oct. 2026, doi: 10.56532/mjsat.v6iS2.814.